Search results for "Optimizing compiler"
showing 2 items of 2 documents
Design Space Exploration for a Custom VLIW Architecture: Direct Photo Printer Hardware Setting Using VEX Compiler
2008
Increasingly more computing power is demanded for contemporary applications such as multimedia, 3D visualization, and telecommunication. This paper presents a design space exploration (DSE) experience for an embedded VLIW processor that allows finding out the best architecture for given application. The proposed method has been implemented and tested using an image processing chain for direct photo printer. Our results show a considerable improvement in hardware cost and performance. After the best architecture is identified, we applied a technique to optimize the code in VEX system that uses ?inlining? function in order to reduce execution time.
Optimizing the Integration Area and Performance of VLIW Architectures by Hardware/Software Co-design
2021
The cost and the performance are major concerns that the designers of embedded processors shall take into account, especially for market considerations. In order to reduce the cost, embedded systems rely on simple hardware architectures like VLIW (Very Long Instruction Word) processors and they look for compiler support. This paper aims at developing a design space explorer of VLIW architectures from different perspectives like processing performance and integration area. A multi-objective Genetic Algorithm (GA) was used to find the optimum hardware configuration of an embedded system and the optimization rules applied by compiler on the benchmarks code. The first step consisted in represen…